The present invention relates to flash memory devices, and more particularly, to a page buffer circuit of a flash memory device and program operation method thereof.
In general, a page buffer circuit included in a flash memory device programs a large quantity of data into a memory cell block or reads a large quantity of data from a memory cell block during a short period of time. In the program operation of a conventional page buffer circuit, one page can be programmed at once. The program operation of the conventional page buffer circuit will be described below in short with reference to FIG. 1.
Referring to FIG. 1, at step 11, data to be programmed are input to the page buffer circuit. At step 12, the page buffer circuit selects a bit line. When a program voltage is supplied to a selected word line, the page buffer circuit outputs the program data to the selected bit line (step 13). At step 14, a program verify step is performed and a check is performed to determine whether the program has been completed (step 15).
If the program has not been completed, steps 13 to 15 are repeated. If the program has been completed, a check is performed to determine whether the page that has been programmed is the last page (step 16). If the page that has been programmed is not the last page, steps 11 to 16 are repeated. In step 13, a next word line is selected. If the page that has been programmed is the last page, the page buffer circuit stops the program operation (step 17).
As described above, in the program operation of the conventional page buffer circuit, one page can be programmed at once. In other words, after the program and verify processes for one page are completed, the program and verify processes for a next page can be executed. Accordingly, the program operation of the conventional page buffer circuit is problematic in that it increases the whole program time of the flash memory device. It is desirable to improve the operation performance of the flash memory device.